Unsupervised Spatial Pattern Classification of Electrical Failures in Semiconductor Manufacturing

In semiconductor manufacturing, the spatial pattern of failed devices in a wafer can give precious hints on which step of the process is responsible for the failures. In particular, the use of unsupervised learning is a promising strategy towards the development of fully automated classification tools. In the literature, Kohonen’s Self Organizing Feature Maps (SOFM) and Adaptive Resonance Theory 1 (ART1) architectures have been compared, concluding that the latter are to be preferred. However, both the simulated and the real data sets used for validation and comparison were very limited. In this paper, the use of ART1 and SOFM as wafer classifiers is re-assessed on much more extensive simulated and real data sets. We conclude that ART1 is not adequate, whereas, SOFM provide completely satisfactory results including visually effective representations of the spatial failure probabilities of the pattern classes.